Do you like...not believe in the idea of power efficiency? Heterogeneous SoCs are one of the biggest reasons why we can have incredibly powerful smartphones that still last all day—you can't run the big cores at full throttle all the time because they just use too much power.
>having identical cores who can slow down and deactivate features on-demand or deactivate itself is a better use of space
With a take like that you're either a CPU micro-arch engineer working at the bleeding edge of research in this area or you have no idea how this actually works. One of the major ways we power optimize a core is by just making all the variable size structures smaller. That is, fewer/narrower execution units, smaller ROBs, smaller caches, less deep predictors, etc. Less hardware running means less leakage, which is the knob we're talking about controlling with little cores.
Now, in theory you can partially power gate a cache to turn, say, a 6-way cache into a 4-way cache, but doing so is extremely complicated from a correctness perspective and is really not something anyone is actually doing today.
And, anyways, fwiw: area is not really the a concern for modern SoCs at this point, it really is an issue of power/thermals. The feature size has gotten so small that they can afford to pack in extra stuff like accelerators and get good value out of them on the basis that it allows them to expend less energy than if they were to just use the CPU. For example, one big reason you see a lot of mobile SoCs with dedicated hardware for inference is because they have space and doing it with dedicate hardware lets them avoid burning a ton of energy on the CPU/GPU.
Cpu(core) hot-plug and a unified cache is not something new, it's also really hard for the OS to get full load (eff+perf cores) without swapping in and out.
>area is not really the a concern for modern SoCs at this point
