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This was done in 64nm CMOS.

I'd love to see rad hard in SiC!

Here is a paper on a high temp SiC RISC-V https://ieeexplore.ieee.org/document/9774769

> We choose RISC-V ISA because it is opensource, small and simple, to avoid over-architecting and ease of extensions

The used this core for the SiC research, https://github.com/bespoke-silicon-group/bsg_manycore/tree/m...



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